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Efficient Processing of Deep Neural Networks: A Tutorial and Survey

A tutorial and survey of hardware and algorithmic techniques for processing deep neural networks efficiently to improve energy efficiency and throughput.

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Efficient Processing of Deep Neural Networks: A Tutorial and Survey

By V. Sze, Yu-hsin Chen, Tien-Ju Yang et al.Proceedings of the IEEE
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Deep neural networks are widely used across artificial intelligence applications such as computer vision, speech recognition, and robotics, but their state-of-the-art accuracy comes at the cost of high computational complexity. This article provides a comprehensive tutorial and survey on techniques that enable efficient processing of DNNs, aiming to improve energy efficiency and throughput without sacrificing application accuracy or increasing hardware cost. It gives an overview of DNNs, discusses various hardware platforms and architectures that support them, and highlights key trends in reducing computation cost either solely through hardware design changes or through joint hardware design and DNN algorithm codesign.

Beyond surveying methods, the article summarizes development resources that help researchers and practitioners get started, and highlights important benchmarking metrics and design considerations for evaluating the rapidly growing number of proposed DNN hardware designs. Readers come away able to understand key DNN design considerations, evaluate different hardware implementations using benchmarks and comparison metrics, weigh tradeoffs among hardware architectures and platforms, and assess the utility of various efficiency techniques, which mattered for guiding practical, energy-efficient DNN deployment.

Abstract

Deep neural networks power many AI applications, delivering top accuracy at high computational cost. Techniques for efficient DNN processing that improve energy efficiency and throughput without sacrificing accuracy or raising hardware cost are critical to deployment. This tutorial and survey overviews DNNs, discusses hardware platforms and architectures supporting them, and highlights trends in cutting computation cost via hardware design or joint hardware-algorithm codesign. It also summarizes benchmarking metrics and design considerations for evaluating DNN hardware.

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deep neural networkshardware efficiencyenergy efficiencyacceleratorshardware-algorithm codesign
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